llvm.org GIT mirror llvm / stable test / CodeGen / PowerPC / combine-setcc.ll
stable

Tree @stable (Download .tar.gz)

combine-setcc.ll @stableraw · history · blame

  1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
; RUN:  -ppc-asm-full-reg-names < %s  | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
; RUN:  -ppc-asm-full-reg-names < %s  | FileCheck %s

define zeroext i1 @eq1(i1 zeroext %x, i1 zeroext %y) {
; CHECK-LABEL: eq1:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    blr
  %sub = sext i1 %x to i32
  %conv3 = zext i1 %y to i32
  %cmp = icmp eq i32 %sub, %conv3
  ret i1 %cmp
}

define zeroext i8 @eq2(i8 zeroext %x, i8 zeroext %y) {
; CHECK-LABEL: eq2:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    blr
  %conv = zext i8 %x to i32
  %sub = sub nsw i32 0, %conv
  %conv1 = zext i8 %y to i32
  %cmp = icmp eq i32 %sub, %conv1
  %conv3 = zext i1 %cmp to i8
  ret i8 %conv3
}

define signext i16 @eq3(i16 signext %x, i16 signext %y) {
; CHECK-LABEL: eq3:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    blr
  %conv = sext i16 %x to i32
  %sub = sub nsw i32 0, %conv
  %conv1 = sext i16 %y to i32
  %cmp = icmp eq i32 %sub, %conv1
  %conv3 = zext i1 %cmp to i16
  ret i16 %conv3
}

define zeroext i16 @eq4(i16 zeroext %x, i16 zeroext %y) {
; CHECK-LABEL: eq4:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    blr
  %conv = zext i16 %x to i32
  %sub = sub nsw i32 0, %conv
  %conv1 = zext i16 %y to i32
  %cmp = icmp eq i32 %sub, %conv1
  %conv3 = zext i1 %cmp to i16
  ret i16 %conv3
}

define signext i32 @eq5(i32 signext %x, i32 signext %y) {
; CHECK-LABEL: eq5:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    blr
  %sub = sub nsw i32 0, %x
  %cmp = icmp eq i32 %sub, %y
  %conv = zext i1 %cmp to i32
  ret i32 %conv
}

define zeroext i32 @eq6(i32 zeroext %x, i32 zeroext %y) {
; CHECK-LABEL: eq6:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    blr
  %sub = sub i32 0, %x
  %cmp = icmp eq i32 %sub, %y
  %conv = zext i1 %cmp to i32
  ret i32 %conv
}

define i64 @eq7(i64 %x, i64 %y) {
; CHECK-LABEL: eq7:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzd r3, r3
; CHECK-NEXT:    rldicl r3, r3, 58, 63
; CHECK-NEXT:    blr
  %sub = sub nsw i64 0, %x
  %cmp = icmp eq i64 %sub, %y
  %zext = zext i1 %cmp to i64
  ret i64 %zext
}

define zeroext i1 @eq8(i1 zeroext %x, i1 zeroext %y) {
; CHECK-LABEL: eq8:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    blr
  %conv = zext i1 %y to i32
  %sub = sext i1 %x to i32
  %cmp = icmp eq i32 %conv, %sub
  ret i1 %cmp
}

define zeroext i8 @eq9(i8 zeroext %x, i8 zeroext %y) {
; CHECK-LABEL: eq9:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r3, r4
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    blr
  %conv = zext i8 %x to i32
  %conv1 = zext i8 %y to i32
  %sub = sub nsw i32 0, %conv1
  %cmp = icmp eq i32 %conv, %sub
  %conv3 = zext i1 %cmp to i8
  ret i8 %conv3
}

define signext i16 @eq10(i16 signext %x, i16 signext %y) {
; CHECK-LABEL: eq10:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r3, r4
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    blr
  %conv = sext i16 %x to i32
  %conv1 = sext i16 %y to i32
  %sub = sub nsw i32 0, %conv1
  %cmp = icmp eq i32 %conv, %sub
  %conv3 = zext i1 %cmp to i16
  ret i16 %conv3
}

define zeroext i16 @eq11(i16 zeroext %x, i16 zeroext %y) {
; CHECK-LABEL: eq11:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r3, r4
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    blr
  %conv = zext i16 %x to i32
  %conv1 = zext i16 %y to i32
  %sub = sub nsw i32 0, %conv1
  %cmp = icmp eq i32 %conv, %sub
  %conv3 = zext i1 %cmp to i16
  ret i16 %conv3
}

define signext i32 @eq12(i32 signext %x, i32 signext %y) {
; CHECK-LABEL: eq12:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r3, r4
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    blr
  %sub = sub nsw i32 0, %y
  %cmp = icmp eq i32 %sub, %x
  %conv = zext i1 %cmp to i32
  ret i32 %conv
}

define zeroext i32 @eq13(i32 zeroext %x, i32 zeroext %y) {
; CHECK-LABEL: eq13:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r3, r4
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    blr
  %sub = sub i32 0, %y
  %cmp = icmp eq i32 %sub, %x
  %conv = zext i1 %cmp to i32
  ret i32 %conv
}

define i64 @eq14(i64 %x, i64 %y) {
; CHECK-LABEL: eq14:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r3, r4
; CHECK-NEXT:    cntlzd r3, r3
; CHECK-NEXT:    rldicl r3, r3, 58, 63
; CHECK-NEXT:    blr
  %sub = sub nsw i64 0, %y
  %cmp = icmp eq i64 %sub, %x
  %conv1 = zext i1 %cmp to i64
  ret i64 %conv1
}

define zeroext i1 @neq1(i1 zeroext %x, i1 zeroext %y) {
; CHECK-LABEL: neq1:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    xori r3, r3, 1
; CHECK-NEXT:    blr
  %sub = sext i1 %x to i32
  %conv3 = zext i1 %y to i32
  %cmp = icmp ne i32 %sub, %conv3
  ret i1 %cmp
}

define zeroext i8 @neq2(i8 zeroext %x, i8 zeroext %y) {
; CHECK-LABEL: neq2:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    xori r3, r3, 1
; CHECK-NEXT:    blr
  %conv = zext i8 %x to i32
  %sub = sub nsw i32 0, %conv
  %conv1 = zext i8 %y to i32
  %cmp = icmp ne i32 %sub, %conv1
  %conv3 = zext i1 %cmp to i8
  ret i8 %conv3
}

define signext i16 @neq3(i16 signext %x, i16 signext %y) {
; CHECK-LABEL: neq3:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    xori r3, r3, 1
; CHECK-NEXT:    blr
  %conv = sext i16 %x to i32
  %sub = sub nsw i32 0, %conv
  %conv1 = sext i16 %y to i32
  %cmp = icmp ne i32 %sub, %conv1
  %conv3 = zext i1 %cmp to i16
  ret i16 %conv3
}

define zeroext i16 @neq4(i16 zeroext %x, i16 zeroext %y) {
; CHECK-LABEL: neq4:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    xori r3, r3, 1
; CHECK-NEXT:    blr
  %conv = zext i16 %x to i32
  %sub = sub nsw i32 0, %conv
  %conv1 = zext i16 %y to i32
  %cmp = icmp ne i32 %sub, %conv1
  %conv3 = zext i1 %cmp to i16
  ret i16 %conv3
}

define signext i32 @neq5(i32 signext %x, i32 signext %y) {
; CHECK-LABEL: neq5:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    xori r3, r3, 1
; CHECK-NEXT:    blr
  %sub = sub nsw i32 0, %x
  %cmp = icmp ne i32 %sub, %y
  %conv = zext i1 %cmp to i32
  ret i32 %conv
}

define zeroext i32 @neq6(i32 zeroext %x, i32 zeroext %y) {
; CHECK-LABEL: neq6:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    xori r3, r3, 1
; CHECK-NEXT:    blr
  %sub = sub i32 0, %x
  %cmp = icmp ne i32 %sub, %y
  %conv = zext i1 %cmp to i32
  ret i32 %conv
}

define i64 @neq7(i64 %x, i64 %y) {
; CHECK-LABEL: neq7:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    addic r4, r3, -1
; CHECK-NEXT:    subfe r3, r4, r3
; CHECK-NEXT:    blr
  %sub = sub nsw i64 0, %x
  %cmp = icmp ne i64 %sub, %y
  %zext = zext i1 %cmp to i64
  ret i64 %zext
}

define zeroext i1 @neq8(i1 zeroext %x, i1 zeroext %y) {
; CHECK-LABEL: neq8:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    xori r3, r3, 1
; CHECK-NEXT:    blr
  %conv = zext i1 %y to i32
  %sub = sext i1 %x to i32
  %cmp = icmp ne i32 %conv, %sub
  ret i1 %cmp
}

define zeroext i8 @neq9(i8 zeroext %x, i8 zeroext %y) {
; CHECK-LABEL: neq9:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    xori r3, r3, 1
; CHECK-NEXT:    blr
  %conv = zext i8 %y to i32
  %conv1 = zext i8 %x to i32
  %sub = sub nsw i32 0, %conv1
  %cmp = icmp ne i32 %conv, %sub
  %conv3 = zext i1 %cmp to i8
  ret i8 %conv3
}

define signext i16 @neq10(i16 signext %x, i16 signext %y) {
; CHECK-LABEL: neq10:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    xori r3, r3, 1
; CHECK-NEXT:    blr
  %conv = sext i16 %y to i32
  %conv1 = sext i16 %x to i32
  %sub = sub nsw i32 0, %conv1
  %cmp = icmp ne i32 %conv, %sub
  %conv3 = zext i1 %cmp to i16
  ret i16 %conv3
}

define zeroext i16 @neq11(i16 zeroext %x, i16 zeroext %y) {
; CHECK-LABEL: neq11:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    xori r3, r3, 1
; CHECK-NEXT:    blr
entry:
  %conv = zext i16 %y to i32
  %conv1 = zext i16 %x to i32
  %sub = sub nsw i32 0, %conv1
  %cmp = icmp ne i32 %conv, %sub
  %conv3 = zext i1 %cmp to i16
  ret i16 %conv3
}

define signext i32 @neq12(i32 signext %x, i32 signext %y) {
; CHECK-LABEL: neq12:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    xori r3, r3, 1
; CHECK-NEXT:    blr
entry:
  %sub = sub nsw i32 0, %x
  %cmp = icmp ne i32 %sub, %y
  %conv = zext i1 %cmp to i32
  ret i32 %conv
}

define zeroext i32 @neq13(i32 zeroext %x, i32 zeroext %y) {
; CHECK-LABEL: neq13:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    cntlzw r3, r3
; CHECK-NEXT:    srwi r3, r3, 5
; CHECK-NEXT:    xori r3, r3, 1
; CHECK-NEXT:    blr
entry:
  %sub = sub i32 0, %x
  %cmp = icmp ne i32 %sub, %y
  %conv = zext i1 %cmp to i32
  ret i32 %conv
}

define i64 @neq14(i64 %x, i64 %y) {
; CHECK-LABEL: neq14:
; CHECK:       # %bb.0:
; CHECK-NEXT:    add r3, r4, r3
; CHECK-NEXT:    addic r4, r3, -1
; CHECK-NEXT:    subfe r3, r4, r3
; CHECK-NEXT:    blr
  %sub = sub nsw i64 0, %x
  %cmp = icmp ne i64 %y, %sub
  %zext = zext i1 %cmp to i64
  ret i64 %zext
}