llvm.org GIT mirror llvm / release_40 test / CodeGen / ARM / imm-peephole-arm.mir
release_40

Tree @release_40 (Download .tar.gz)

imm-peephole-arm.mir @release_40raw · history · blame

# RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s

# CHECK: [[IN:%.*]] = COPY %r0
# CHECK: [[SUM1TMP:%.*]] = ADDri [[IN]], 133
# CHECK: [[SUM1:%.*]] = ADDri killed [[SUM1TMP]], 25600

# CHECK: [[SUM2TMP:%.*]] = SUBri [[IN]], 133
# CHECK: [[SUM2:%.*]] = SUBri killed [[SUM2TMP]], 25600

# CHECK: [[SUM3TMP:%.*]] = SUBri [[IN]], 133
# CHECK: [[SUM3:%.*]] = SUBri killed [[SUM3TMP]], 25600

# CHECK: [[SUM4TMP:%.*]] = ADDri killed [[IN]], 133
# CHECK: [[SUM4:%.*]] = ADDri killed [[SUM4TMP]], 25600


--- |
  target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
  target triple = "armv7-apple-ios"

  define i32 @foo(i32 %in) {
    ret i32 undef
  }
...
---
name:            foo
registers:
  - { id: 0, class: gprnopc }
  - { id: 1, class: rgpr }
  - { id: 2, class: rgpr }
  - { id: 3, class: rgpr }
  - { id: 4, class: rgpr }
  - { id: 5, class: rgpr }
  - { id: 6, class: rgpr }
  - { id: 7, class: rgpr }
  - { id: 8, class: rgpr }
liveins:
  - { reg: '%r0', virtual-reg: '%0' }
body:             |
  bb.0 (%ir-block.0):
    liveins: %r0

    %0 = COPY %r0
    %1 = MOVi32imm -25733
    %2 = SUBrr %0, killed %1, 14, _, _

    %3 = MOVi32imm 25733
    %4 = SUBrr %0, killed %3, 14, _, _

    %5 = MOVi32imm -25733
    %6 = ADDrr %0, killed %5, 14, _, _

    %7 = MOVi32imm 25733
    %8 = ADDrr killed %0, killed %7, 14, _, _

    %r0 = COPY killed %8
    BX_RET 14, _, implicit %r0

...