Tree @release_36 (Download .tar.gz)
- ..
- 128bit_load_store.ll
- a57-csel.ll
- aarch64-2014-08-11-MachineCombinerCrash.ll
- aarch64-2014-12-02-combine-soften.ll
- aarch64-a57-fp-load-balancing.ll
- aarch64-address-type-promotion-assertion.ll
- aarch64-address-type-promotion.ll
- aarch64-be-bv.ll
- aarch64-fix-cortex-a53-835769.ll
- aarch64-gep-opt.ll
- aarch64-neon-v1i1-setcc.ll
- aarch64-smull.ll
- aarch64-wide-shuffle.ll
- aarch64_f16_be.ll
- aarch64_tree_tests.ll
- adc.ll
- addsub-shifted.ll
- addsub.ll
- addsub_ext.ll
- alloca.ll
- analyze-branch.ll
- analyzecmp.ll
- and-mask-removal.ll
- andandshift.ll
- argument-blocks.ll
- arm64-2011-03-09-CPSRSpill.ll
- arm64-2011-03-17-AsmPrinterCrash.ll
- arm64-2011-03-21-Unaligned-Frame-Index.ll
- arm64-2011-04-21-CPSRBug.ll
- arm64-2011-10-18-LdStOptBug.ll
- arm64-2012-01-11-ComparisonDAGCrash.ll
- arm64-2012-05-07-DAGCombineVectorExtract.ll
- arm64-2012-05-07-MemcpyAlignBug.ll
- arm64-2012-05-09-LOADgot-bug.ll
- arm64-2012-05-22-LdStOptBug.ll
- arm64-2012-06-06-FPToUI.ll
- arm64-2012-07-11-InstrEmitterBug.ll
- arm64-2013-01-13-ffast-fcmp.ll
- arm64-2013-01-23-frem-crash.ll
- arm64-2013-01-23-sext-crash.ll
- arm64-2013-02-12-shufv8i8.ll
- arm64-aapcs-be.ll
- arm64-aapcs.ll
- arm64-abi-varargs.ll
- arm64-abi.ll
- arm64-abi_align.ll
- arm64-addp.ll
- arm64-addr-mode-folding.ll
- arm64-addr-type-promotion.ll
- arm64-addrmode.ll
- arm64-AdvSIMD-Scalar.ll
- arm64-alloc-no-stack-realign.ll
- arm64-alloca-frame-pointer-offset.ll
- arm64-andCmpBrToTBZ.ll
- arm64-ands-bad-peephole.ll
- arm64-AnInfiniteLoopInDAGCombine.ll
- arm64-anyregcc-crash.ll
- arm64-anyregcc.ll
- arm64-arith-saturating.ll
- arm64-arith.ll
- arm64-arm64-dead-def-elimination-flag.ll
- arm64-atomic-128.ll
- arm64-atomic.ll
- arm64-basic-pic.ll
- arm64-bcc.ll
- arm64-big-endian-bitconverts.ll
- arm64-big-endian-eh.ll
- arm64-big-endian-varargs.ll
- arm64-big-endian-vector-callee.ll
- arm64-big-endian-vector-caller.ll
- arm64-big-imm-offsets.ll
- arm64-big-stack.ll
- arm64-bitfield-extract.ll
- arm64-blockaddress.ll
- arm64-build-vector.ll
- arm64-call-tailcalls.ll
- arm64-cast-opt.ll
- arm64-ccmp-heuristics.ll
- arm64-ccmp.ll
- arm64-clrsb.ll
- arm64-coalesce-ext.ll
- arm64-code-model-large-abs.ll
- arm64-collect-loh-garbage-crash.ll
- arm64-collect-loh-str.ll
- arm64-collect-loh.ll
- arm64-complex-copy-noneon.ll
- arm64-complex-ret.ll
- arm64-const-addr.ll
- arm64-convert-v4f64.ll
- arm64-copy-tuple.ll
- arm64-crc32.ll
- arm64-crypto.ll
- arm64-cse.ll
- arm64-csel.ll
- arm64-cvt.ll
- arm64-dagcombiner-convergence.ll
- arm64-dagcombiner-dead-indexed-load.ll
- arm64-dagcombiner-load-slicing.ll
- arm64-dead-def-frame-index.ll
- arm64-dead-register-def-bug.ll
- arm64-dup.ll
- arm64-early-ifcvt.ll
- arm64-elf-calls.ll
- arm64-elf-constpool.ll
- arm64-elf-globals.ll
- arm64-EXT-undef-mask.ll
- arm64-ext.ll
- arm64-extend-int-to-fp.ll
- arm64-extend.ll
- arm64-extern-weak.ll
- arm64-extload-knownzero.ll
- arm64-extract.ll
- arm64-extract_subvector.ll
- arm64-fast-isel-addr-offset.ll
- arm64-fast-isel-alloca.ll
- arm64-fast-isel-br.ll
- arm64-fast-isel-call.ll
- arm64-fast-isel-conversion.ll
- arm64-fast-isel-fcmp.ll
- arm64-fast-isel-gv.ll
- arm64-fast-isel-icmp.ll
- arm64-fast-isel-indirectbr.ll
- arm64-fast-isel-intrinsic.ll
- arm64-fast-isel-materialize.ll
- arm64-fast-isel-noconvert.ll
- arm64-fast-isel-rem.ll
- arm64-fast-isel-ret.ll
- arm64-fast-isel-store.ll
- arm64-fast-isel.ll
- arm64-fastcc-tailcall.ll
- arm64-fastisel-gep-promote-before-add.ll
- arm64-fcmp-opt.ll
- arm64-fcopysign.ll
- arm64-fixed-point-scalar-cvt-dagcombine.ll
- arm64-fmadd.ll
- arm64-fmax.ll
- arm64-fminv.ll
- arm64-fmuladd.ll
- arm64-fold-address.ll
- arm64-fold-lsl.ll
- arm64-fp-contract-zero.ll
- arm64-fp-imm.ll
- arm64-fp.ll
- arm64-fp128-folding.ll
- arm64-fp128.ll
- arm64-frame-index.ll
- arm64-global-address.ll
- arm64-hello.ll
- arm64-i16-subreg-extract.ll
- arm64-icmp-opt.ll
- arm64-illegal-float-ops.ll
- arm64-indexed-memory.ll
- arm64-indexed-vector-ldst-2.ll
- arm64-indexed-vector-ldst.ll
- arm64-inline-asm-error-I.ll
- arm64-inline-asm-error-J.ll
- arm64-inline-asm-error-K.ll
- arm64-inline-asm-error-L.ll
- arm64-inline-asm-error-M.ll
- arm64-inline-asm-error-N.ll
- arm64-inline-asm-zero-reg-error.ll
- arm64-inline-asm.ll
- arm64-join-reserved.ll
- arm64-jumptable.ll
- arm64-large-frame.ll
- arm64-ld1.ll
- arm64-ldp.ll
- arm64-ldur.ll
- arm64-ldxr-stxr.ll
- arm64-leaf.ll
- arm64-long-shift.ll
- arm64-memcpy-inline.ll
- arm64-memset-inline.ll
- arm64-memset-to-bzero.ll
- arm64-misched-basic-A53.ll
- arm64-misched-basic-A57.ll
- arm64-misched-forwarding-A53.ll
- arm64-movi.ll
- arm64-mul.ll
- arm64-named-reg-alloc.ll
- arm64-named-reg-notareg.ll
- arm64-neg.ll
- arm64-neon-2velem-high.ll
- arm64-neon-2velem.ll
- arm64-neon-3vdiff.ll
- arm64-neon-aba-abd.ll
- arm64-neon-across.ll
- arm64-neon-add-pairwise.ll
- arm64-neon-add-sub.ll
- arm64-neon-compare-instructions.ll
- arm64-neon-copy.ll
- arm64-neon-copyPhysReg-tuple.ll
- arm64-neon-mul-div.ll
- arm64-neon-scalar-by-elem-mul.ll
- arm64-neon-select_cc.ll
- arm64-neon-simd-ldst-one.ll
- arm64-neon-simd-shift.ll
- arm64-neon-simd-vget.ll
- arm64-neon-v1i1-setcc.ll
- arm64-neon-vector-list-spill.ll
- arm64-patchpoint-scratch-regs.ll
- arm64-patchpoint-webkit_jscc.ll
- arm64-patchpoint.ll
- arm64-pic-local-symbol.ll
- arm64-platform-reg.ll
- arm64-popcnt.ll
- arm64-prefetch.ll
- arm64-promote-const.ll
- arm64-redzone.ll
- arm64-reg-copy-noneon.ll
- arm64-register-offset-addressing.ll
- arm64-register-pairing.ll
- arm64-regress-f128csel-flags.ll
- arm64-regress-interphase-shift.ll
- arm64-return-vector.ll
- arm64-returnaddr.ll
- arm64-rev.ll
- arm64-rounding.ll
- arm64-scaled_iv.ll
- arm64-scvt.ll
- arm64-setcc-int-to-fp-combine.ll
- arm64-shifted-sext.ll
- arm64-shrink-v1i64.ll
- arm64-simd-scalar-to-vector.ll
- arm64-simplest-elf.ll
- arm64-sincos.ll
- arm64-sitofp-combine-chains.ll
- arm64-sli-sri-opt.ll
- arm64-smaxv.ll
- arm64-sminv.ll
- arm64-spill-lr.ll
- arm64-spill.ll
- arm64-sqshl-uqshl-i64Contant.ll
- arm64-st1.ll
- arm64-stack-no-frame.ll
- arm64-stackmap-nops.ll
- arm64-stackmap.ll
- arm64-stackpointer.ll
- arm64-stacksave.ll
- arm64-stp.ll
- arm64-strict-align.ll
- arm64-stur.ll
- arm64-subsections.ll
- arm64-subvector-extend.ll
- arm64-swizzle-tbl-i16-layout.ll
- arm64-tbl.ll
- arm64-this-return.ll
- arm64-tls-darwin.ll
- arm64-tls-dynamic-together.ll
- arm64-tls-dynamics.ll
- arm64-tls-execs.ll
- arm64-trap.ll
- arm64-triv-disjoint-mem-access.ll
- arm64-trn.ll
- arm64-trunc-store.ll
- arm64-umaxv.ll
- arm64-uminv.ll
- arm64-umov.ll
- arm64-unaligned_ldst.ll
- arm64-uzp.ll
- arm64-vaargs.ll
- arm64-vabs.ll
- arm64-vadd.ll
- arm64-vaddlv.ll
- arm64-vaddv.ll
- arm64-variadic-aapcs.ll
- arm64-vbitwise.ll
- arm64-vclz.ll
- arm64-vcmp.ll
- arm64-vcnt.ll
- arm64-vcombine.ll
- arm64-vcvt.ll
- arm64-vcvt_f.ll
- arm64-vcvt_f32_su32.ll
- arm64-vcvt_n.ll
- arm64-vcvt_su32_f32.ll
- arm64-vcvtxd_f32_f64.ll
- arm64-vecCmpBr.ll
- arm64-vecFold.ll
- arm64-vector-ext.ll
- arm64-vector-imm.ll
- arm64-vector-insertion.ll
- arm64-vector-ldst.ll
- arm64-vext.ll
- arm64-vext_reverse.ll
- arm64-vfloatintrinsics.ll
- arm64-vhadd.ll
- arm64-vhsub.ll
- arm64-virtual_base.ll
- arm64-vmax.ll
- arm64-vminmaxnm.ll
- arm64-vmovn.ll
- arm64-vmul.ll
- arm64-volatile.ll
- arm64-vpopcnt.ll
- arm64-vqadd.ll
- arm64-vqsub.ll
- arm64-vselect.ll
- arm64-vsetcc_fp.ll
- arm64-vshift.ll
- arm64-vshr.ll
- arm64-vshuffle.ll
- arm64-vsqrt.ll
- arm64-vsra.ll
- arm64-vsub.ll
- arm64-weak-reference.ll
- arm64-xaluo.ll
- arm64-zero-cycle-regmov.ll
- arm64-zero-cycle-zeroing.ll
- arm64-zext.ll
- arm64-zextload-unscaled.ll
- arm64-zip.ll
- asm-large-immediate.ll
- assertion-rc-mismatch.ll
- atomic-ops-not-barriers.ll
- atomic-ops.ll
- basic-pic.ll
- bitcast-v2i8.ll
- bitfield-insert-0.ll
- bitfield-insert.ll
- bitfield.ll
- blockaddress.ll
- bool-loads.ll
- br-to-eh-lpad.ll
- br-undef-cond.ll
- branch-relax-asm.ll
- breg.ll
- callee-save.ll
- cmp-const-max.ll
- cmpwithshort.ll
- cmpxchg-idioms.ll
- code-model-large-abs.ll
- combine-comparisons-by-cse.ll
- compare-branch.ll
- compiler-ident.ll
- complex-copy-noneon.ll
- complex-fp-to-int.ll
- complex-int-to-fp.ll
- cond-sel.ll
- cpus.ll
- dag-combine-invaraints.ll
- directcond.ll
- dont-take-over-the-world.ll
- dp-3source.ll
- dp1.ll
- dp2.ll
- eliminate-trunc.ll
- extern-weak.ll
- extract.ll
- f16-convert.ll
- fast-isel-addressing-modes.ll
- fast-isel-branch-cond-split.ll
- fast-isel-branch_weights.ll
- fast-isel-call-return.ll
- fast-isel-cbz.ll
- fast-isel-cmp-branch.ll
- fast-isel-folding.ll
- fast-isel-gep.ll
- fast-isel-int-ext.ll
- fast-isel-int-ext2.ll
- fast-isel-int-ext3.ll
- fast-isel-int-ext4.ll
- fast-isel-intrinsic.ll
- fast-isel-logic-op.ll
- fast-isel-memcpy.ll
- fast-isel-mul.ll
- fast-isel-runtime-libcall.ll
- fast-isel-sdiv.ll
- fast-isel-select.ll
- fast-isel-shift.ll
- fast-isel-sqrt.ll
- fast-isel-switch-phi.ll
- fast-isel-tbz.ll
- fast-isel-trunc.ll
- fast-isel-vector-arithmetic.ll
- fast-isel-vret.ll
- fastcc-reserved.ll
- fastcc.ll
- fcmp.ll
- fcvt-fixed.ll
- fcvt-int.ll
- fdiv-combine.ll
- flags-multiuse.ll
- floatdp_1source.ll
- floatdp_2source.ll
- fp-cond-sel.ll
- fp-dp3.ll
- fp128-folding.ll
- fp16-instructions.ll
- fp16-v4-instructions.ll
- fp16-v8-instructions.ll
- fp16-vector-bitcast.ll
- fp16-vector-load-store.ll
- fp16-vector-shuffle.ll
- fpconv-vector-op-scalarize.ll
- fpimm.ll
- frameaddr.ll
- free-zext.ll
- func-argpassing.ll
- func-calls.ll
- funcptr_cast.ll
- ghc-cc.ll
- global-alignment.ll
- global-merge-1.ll
- global-merge-2.ll
- global-merge-3.ll
- global-merge-4.ll
- global-merge.ll
- got-abuse.ll
- half.ll
- hints.ll
- i1-contents.ll
- i128-align.ll
- i128-fast-isel-fallback.ll
- illegal-float-ops.ll
- implicit-sret.ll
- init-array.ll
- inline-asm-constraints-badI.ll
- inline-asm-constraints-badK.ll
- inline-asm-constraints-badK2.ll
- inline-asm-constraints-badL.ll
- inlineasm-ldr-pseudo.ll
- intrinsics-memory-barrier.ll
- jump-table.ll
- large-consts.ll
- ldst-opt.ll
- ldst-regoffset.ll
- ldst-unscaledimm.ll
- ldst-unsignedimm.ll
- legalize-bug-bogus-cpu.ll
- lit.local.cfg
- literal_pools_float.ll
- local_vars.ll
- logical-imm.ll
- logical_shifted_reg.ll
- machine-copy-prop.ll
- machine_cse.ll
- machine_cse_impdef_killflags.ll
- madd-combiner.ll
- madd-lohi.ll
- mature-mc-support.ll
- memcpy-f128.ll
- movw-consts.ll
- movw-shift-encoding.ll
- mul-lohi.ll
- mul_pow2.ll
- neon-bitcast.ll
- neon-bitwise-instructions.ll
- neon-compare-instructions.ll
- neon-diagnostics.ll
- neon-extract.ll
- neon-fma.ll
- neon-fpround_f128.ll
- neon-idiv.ll
- neon-mla-mls.ll
- neon-mov.ll
- neon-or-combine.ll
- neon-perm.ll
- neon-scalar-by-elem-fma.ll
- neon-scalar-copy.ll
- neon-shift-left-long.ll
- neon-truncStore-extLoad.ll
- nzcv-save.ll
- paired-load.ll
- PBQP-chain.ll
- PBQP-coalesce-benefit.ll
- PBQP-csr.ll
- PBQP.ll
- pic-eh-stubs.ll
- postra-mi-sched.ll
- ragreedy-csr.ll
- rbit.ll
- Redundantstore.ll
- regress-bitcast-formals.ll
- regress-f128csel-flags.ll
- regress-fp128-livein.ll
- regress-tail-livereg.ll
- regress-tblgen-chains.ll
- regress-w29-reserved-with-fp.ll
- remat.ll
- returnaddr.ll
- rm_redundant_cmp.ll
- sdivpow2.ll
- setcc-takes-i32.ll
- setcc-type-mismatch.ll
- sibling-call.ll
- sincos-expansion.ll
- sincospow-vector-expansion.ll
- stack-guard-remat-bitcast.ll
- stack_guard_remat.ll
- tail-call.ll
- tailcall-explicit-sret.ll
- tailcall-fastisel.ll
- tailcall-implicit-sret.ll
- tbz-tbnz.ll
- trunc-v1i64.ll
- tst-br.ll
- zero-reg.ll
arm64-movi.ll @release_36 — raw · history · blame
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 | ; RUN: llc < %s -march=arm64 | FileCheck %s
;==--------------------------------------------------------------------------==
; Tests for MOV-immediate implemented with ORR-immediate.
;==--------------------------------------------------------------------------==
; 64-bit immed with 32-bit pattern size, rotated by 0.
define i64 @test64_32_rot0() nounwind {
; CHECK-LABEL: test64_32_rot0:
; CHECK: orr x0, xzr, #0x700000007
ret i64 30064771079
}
; 64-bit immed with 32-bit pattern size, rotated by 2.
define i64 @test64_32_rot2() nounwind {
; CHECK-LABEL: test64_32_rot2:
; CHECK: orr x0, xzr, #0xc0000003c0000003
ret i64 13835058071388291075
}
; 64-bit immed with 4-bit pattern size, rotated by 3.
define i64 @test64_4_rot3() nounwind {
; CHECK-LABEL: test64_4_rot3:
; CHECK: orr x0, xzr, #0xeeeeeeeeeeeeeeee
ret i64 17216961135462248174
}
; 32-bit immed with 32-bit pattern size, rotated by 16.
define i32 @test32_32_rot16() nounwind {
; CHECK-LABEL: test32_32_rot16:
; CHECK: orr w0, wzr, #0xff0000
ret i32 16711680
}
; 32-bit immed with 2-bit pattern size, rotated by 1.
define i32 @test32_2_rot1() nounwind {
; CHECK-LABEL: test32_2_rot1:
; CHECK: orr w0, wzr, #0xaaaaaaaa
ret i32 2863311530
}
;==--------------------------------------------------------------------------==
; Tests for MOVZ with MOVK.
;==--------------------------------------------------------------------------==
define i32 @movz() nounwind {
; CHECK-LABEL: movz:
; CHECK: movz w0, #0x5
ret i32 5
}
define i64 @movz_3movk() nounwind {
; CHECK-LABEL: movz_3movk:
; CHECK: movz x0, #0x5, lsl #48
; CHECK-NEXT: movk x0, #0x1234, lsl #32
; CHECK-NEXT: movk x0, #0xabcd, lsl #16
; CHECK-NEXT: movk x0, #0x5678
ret i64 1427392313513592
}
define i64 @movz_movk_skip1() nounwind {
; CHECK-LABEL: movz_movk_skip1:
; CHECK: movz x0, #0x5, lsl #32
; CHECK-NEXT: movk x0, #0x4321, lsl #16
ret i64 22601072640
}
define i64 @movz_skip1_movk() nounwind {
; CHECK-LABEL: movz_skip1_movk:
; CHECK: movz x0, #0x8654, lsl #32
; CHECK-NEXT: movk x0, #0x1234
ret i64 147695335379508
}
;==--------------------------------------------------------------------------==
; Tests for MOVN with MOVK.
;==--------------------------------------------------------------------------==
define i64 @movn() nounwind {
; CHECK-LABEL: movn:
; CHECK: movn x0, #0x29
ret i64 -42
}
define i64 @movn_skip1_movk() nounwind {
; CHECK-LABEL: movn_skip1_movk:
; CHECK: movn x0, #0x29, lsl #32
; CHECK-NEXT: movk x0, #0x1234
ret i64 -176093720012
}
;==--------------------------------------------------------------------------==
; Tests for ORR with MOVK.
;==--------------------------------------------------------------------------==
; rdar://14987673
define i64 @orr_movk1() nounwind {
; CHECK-LABEL: orr_movk1:
; CHECK: orr x0, xzr, #0xffff0000ffff0
; CHECK: movk x0, #0xdead, lsl #16
ret i64 72056498262245120
}
define i64 @orr_movk2() nounwind {
; CHECK-LABEL: orr_movk2:
; CHECK: orr x0, xzr, #0xffff0000ffff0
; CHECK: movk x0, #0xdead, lsl #48
ret i64 -2400982650836746496
}
define i64 @orr_movk3() nounwind {
; CHECK-LABEL: orr_movk3:
; CHECK: orr x0, xzr, #0xffff0000ffff0
; CHECK: movk x0, #0xdead, lsl #32
ret i64 72020953688702720
}
define i64 @orr_movk4() nounwind {
; CHECK-LABEL: orr_movk4:
; CHECK: orr x0, xzr, #0xffff0000ffff0
; CHECK: movk x0, #0xdead
ret i64 72056494543068845
}
; rdar://14987618
define i64 @orr_movk5() nounwind {
; CHECK-LABEL: orr_movk5:
; CHECK: orr x0, xzr, #0xff00ff00ff00ff00
; CHECK: movk x0, #0xdead, lsl #16
ret i64 -71777214836900096
}
define i64 @orr_movk6() nounwind {
; CHECK-LABEL: orr_movk6:
; CHECK: orr x0, xzr, #0xff00ff00ff00ff00
; CHECK: movk x0, #0xdead, lsl #16
; CHECK: movk x0, #0xdead, lsl #48
ret i64 -2400982647117578496
}
define i64 @orr_movk7() nounwind {
; CHECK-LABEL: orr_movk7:
; CHECK: orr x0, xzr, #0xff00ff00ff00ff00
; CHECK: movk x0, #0xdead, lsl #48
ret i64 -2400982646575268096
}
define i64 @orr_movk8() nounwind {
; CHECK-LABEL: orr_movk8:
; CHECK: orr x0, xzr, #0xff00ff00ff00ff00
; CHECK: movk x0, #0xdead
; CHECK: movk x0, #0xdead, lsl #48
ret i64 -2400982646575276371
}
; rdar://14987715
define i64 @orr_movk9() nounwind {
; CHECK-LABEL: orr_movk9:
; CHECK: orr x0, xzr, #0xffffff000000000
; CHECK: movk x0, #0xff00
; CHECK: movk x0, #0xdead, lsl #16
ret i64 1152921439623315200
}
define i64 @orr_movk10() nounwind {
; CHECK-LABEL: orr_movk10:
; CHECK: orr x0, xzr, #0xfffffffffffff00
; CHECK: movk x0, #0xdead, lsl #16
ret i64 1152921504047824640
}
define i64 @orr_movk11() nounwind {
; CHECK-LABEL: orr_movk11:
; CHECK: orr x0, xzr, #0xfff00000000000ff
; CHECK: movk x0, #0xdead, lsl #16
; CHECK: movk x0, #0xffff, lsl #32
ret i64 -4222125209747201
}
define i64 @orr_movk12() nounwind {
; CHECK-LABEL: orr_movk12:
; CHECK: orr x0, xzr, #0xfff00000000000ff
; CHECK: movk x0, #0xdead, lsl #32
ret i64 -4258765016661761
}
define i64 @orr_movk13() nounwind {
; CHECK-LABEL: orr_movk13:
; CHECK: orr x0, xzr, #0xfffff000000
; CHECK: movk x0, #0xdead
; CHECK: movk x0, #0xdead, lsl #48
ret i64 -2401245434149282131
}
; rdar://13944082
define i64 @g() nounwind {
; CHECK-LABEL: g:
; CHECK: movz x0, #0xffff, lsl #48
; CHECK: movk x0, #0x2
entry:
ret i64 -281474976710654
}
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