llvm.org GIT mirror llvm / release_34 test / CodeGen / SystemZ / int-conv-05.ll
release_34

Tree @release_34 (Download .tar.gz)

int-conv-05.ll @release_34

b503b49
 
 
 
 
 
8b2b8a1
b503b49
88a9e6a
b503b49
 
 
 
 
 
 
8b2b8a1
b503b49
88a9e6a
b503b49
 
 
 
 
 
 
8b2b8a1
b503b49
 
 
 
 
 
 
 
 
8b2b8a1
b503b49
 
 
 
 
 
 
 
 
 
8b2b8a1
b503b49
 
 
 
 
 
 
 
 
 
8b2b8a1
b503b49
 
 
 
 
 
 
 
 
 
 
8b2b8a1
b503b49
 
 
 
 
 
 
 
 
 
 
8b2b8a1
b503b49
 
 
 
 
 
 
 
 
 
8b2b8a1
b503b49
 
 
 
 
 
 
 
 
 
 
8b2b8a1
b503b49
 
 
 
 
 
 
 
 
 
 
8b2b8a1
b503b49
 
 
 
 
 
 
 
 
 
 
 
8b2b8a1
b503b49
 
 
 
 
 
 
 
 
fa487e8
 
 
 
8b2b8a1
fa487e8
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
; Test sign extensions from a halfword to an i32.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s

; Test register extension, starting with an i32.
define i32 @f1(i32 %a) {
; CHECK-LABEL: f1:
; CHECK: lhr %r2, %r2
; CHECK: br %r14
  %half = trunc i32 %a to i16
  %ext = sext i16 %half to i32
  ret i32 %ext
}

; ...and again with an i64.
define i32 @f2(i64 %a) {
; CHECK-LABEL: f2:
; CHECK: lhr %r2, %r2
; CHECK: br %r14
  %half = trunc i64 %a to i16
  %ext = sext i16 %half to i32
  ret i32 %ext
}

; Check the low end of the LH range.
define i32 @f3(i16 *%src) {
; CHECK-LABEL: f3:
; CHECK: lh %r2, 0(%r2)
; CHECK: br %r14
  %half = load i16 *%src
  %ext = sext i16 %half to i32
  ret i32 %ext
}

; Check the high end of the LH range.
define i32 @f4(i16 *%src) {
; CHECK-LABEL: f4:
; CHECK: lh %r2, 4094(%r2)
; CHECK: br %r14
  %ptr = getelementptr i16 *%src, i64 2047
  %half = load i16 *%ptr
  %ext = sext i16 %half to i32
  ret i32 %ext
}

; Check the next halfword up, which needs LHY rather than LH.
define i32 @f5(i16 *%src) {
; CHECK-LABEL: f5:
; CHECK: lhy %r2, 4096(%r2)
; CHECK: br %r14
  %ptr = getelementptr i16 *%src, i64 2048
  %half = load i16 *%ptr
  %ext = sext i16 %half to i32
  ret i32 %ext
}

; Check the high end of the LHY range.
define i32 @f6(i16 *%src) {
; CHECK-LABEL: f6:
; CHECK: lhy %r2, 524286(%r2)
; CHECK: br %r14
  %ptr = getelementptr i16 *%src, i64 262143
  %half = load i16 *%ptr
  %ext = sext i16 %half to i32
  ret i32 %ext
}

; Check the next halfword up, which needs separate address logic.
; Other sequences besides this one would be OK.
define i32 @f7(i16 *%src) {
; CHECK-LABEL: f7:
; CHECK: agfi %r2, 524288
; CHECK: lh %r2, 0(%r2)
; CHECK: br %r14
  %ptr = getelementptr i16 *%src, i64 262144
  %half = load i16 *%ptr
  %ext = sext i16 %half to i32
  ret i32 %ext
}

; Check the high end of the negative LHY range.
define i32 @f8(i16 *%src) {
; CHECK-LABEL: f8:
; CHECK: lhy %r2, -2(%r2)
; CHECK: br %r14
  %ptr = getelementptr i16 *%src, i64 -1
  %half = load i16 *%ptr
  %ext = sext i16 %half to i32
  ret i32 %ext
}

; Check the low end of the LHY range.
define i32 @f9(i16 *%src) {
; CHECK-LABEL: f9:
; CHECK: lhy %r2, -524288(%r2)
; CHECK: br %r14
  %ptr = getelementptr i16 *%src, i64 -262144
  %half = load i16 *%ptr
  %ext = sext i16 %half to i32
  ret i32 %ext
}

; Check the next halfword down, which needs separate address logic.
; Other sequences besides this one would be OK.
define i32 @f10(i16 *%src) {
; CHECK-LABEL: f10:
; CHECK: agfi %r2, -524290
; CHECK: lh %r2, 0(%r2)
; CHECK: br %r14
  %ptr = getelementptr i16 *%src, i64 -262145
  %half = load i16 *%ptr
  %ext = sext i16 %half to i32
  ret i32 %ext
}

; Check that LH allows an index
define i32 @f11(i64 %src, i64 %index) {
; CHECK-LABEL: f11:
; CHECK: lh %r2, 4094(%r3,%r2)
; CHECK: br %r14
  %add1 = add i64 %src, %index
  %add2 = add i64 %add1, 4094
  %ptr = inttoptr i64 %add2 to i16 *
  %half = load i16 *%ptr
  %ext = sext i16 %half to i32
  ret i32 %ext
}

; Check that LH allows an index
define i32 @f12(i64 %src, i64 %index) {
; CHECK-LABEL: f12:
; CHECK: lhy %r2, 4096(%r3,%r2)
; CHECK: br %r14
  %add1 = add i64 %src, %index
  %add2 = add i64 %add1, 4096
  %ptr = inttoptr i64 %add2 to i16 *
  %half = load i16 *%ptr
  %ext = sext i16 %half to i32
  ret i32 %ext
}

; Test a case where we spill the source of at least one LHR.  We want
; to use LH if possible.
define void @f13(i32 *%ptr) {
; CHECK-LABEL: f13:
; CHECK: lh {{%r[0-9]+}}, 16{{[26]}}(%r15)
; CHECK: br %r14
  %val0 = load volatile i32 *%ptr
  %val1 = load volatile i32 *%ptr
  %val2 = load volatile i32 *%ptr
  %val3 = load volatile i32 *%ptr
  %val4 = load volatile i32 *%ptr
  %val5 = load volatile i32 *%ptr
  %val6 = load volatile i32 *%ptr
  %val7 = load volatile i32 *%ptr
  %val8 = load volatile i32 *%ptr
  %val9 = load volatile i32 *%ptr
  %val10 = load volatile i32 *%ptr
  %val11 = load volatile i32 *%ptr
  %val12 = load volatile i32 *%ptr
  %val13 = load volatile i32 *%ptr
  %val14 = load volatile i32 *%ptr
  %val15 = load volatile i32 *%ptr

  %trunc0 = trunc i32 %val0 to i16
  %trunc1 = trunc i32 %val1 to i16
  %trunc2 = trunc i32 %val2 to i16
  %trunc3 = trunc i32 %val3 to i16
  %trunc4 = trunc i32 %val4 to i16
  %trunc5 = trunc i32 %val5 to i16
  %trunc6 = trunc i32 %val6 to i16
  %trunc7 = trunc i32 %val7 to i16
  %trunc8 = trunc i32 %val8 to i16
  %trunc9 = trunc i32 %val9 to i16
  %trunc10 = trunc i32 %val10 to i16
  %trunc11 = trunc i32 %val11 to i16
  %trunc12 = trunc i32 %val12 to i16
  %trunc13 = trunc i32 %val13 to i16
  %trunc14 = trunc i32 %val14 to i16
  %trunc15 = trunc i32 %val15 to i16

  %ext0 = sext i16 %trunc0 to i32
  %ext1 = sext i16 %trunc1 to i32
  %ext2 = sext i16 %trunc2 to i32
  %ext3 = sext i16 %trunc3 to i32
  %ext4 = sext i16 %trunc4 to i32
  %ext5 = sext i16 %trunc5 to i32
  %ext6 = sext i16 %trunc6 to i32
  %ext7 = sext i16 %trunc7 to i32
  %ext8 = sext i16 %trunc8 to i32
  %ext9 = sext i16 %trunc9 to i32
  %ext10 = sext i16 %trunc10 to i32
  %ext11 = sext i16 %trunc11 to i32
  %ext12 = sext i16 %trunc12 to i32
  %ext13 = sext i16 %trunc13 to i32
  %ext14 = sext i16 %trunc14 to i32
  %ext15 = sext i16 %trunc15 to i32

  store volatile i32 %val0, i32 *%ptr
  store volatile i32 %val1, i32 *%ptr
  store volatile i32 %val2, i32 *%ptr
  store volatile i32 %val3, i32 *%ptr
  store volatile i32 %val4, i32 *%ptr
  store volatile i32 %val5, i32 *%ptr
  store volatile i32 %val6, i32 *%ptr
  store volatile i32 %val7, i32 *%ptr
  store volatile i32 %val8, i32 *%ptr
  store volatile i32 %val9, i32 *%ptr
  store volatile i32 %val10, i32 *%ptr
  store volatile i32 %val11, i32 *%ptr
  store volatile i32 %val12, i32 *%ptr
  store volatile i32 %val13, i32 *%ptr
  store volatile i32 %val14, i32 *%ptr
  store volatile i32 %val15, i32 *%ptr

  store volatile i32 %ext0, i32 *%ptr
  store volatile i32 %ext1, i32 *%ptr
  store volatile i32 %ext2, i32 *%ptr
  store volatile i32 %ext3, i32 *%ptr
  store volatile i32 %ext4, i32 *%ptr
  store volatile i32 %ext5, i32 *%ptr
  store volatile i32 %ext6, i32 *%ptr
  store volatile i32 %ext7, i32 *%ptr
  store volatile i32 %ext8, i32 *%ptr
  store volatile i32 %ext9, i32 *%ptr
  store volatile i32 %ext10, i32 *%ptr
  store volatile i32 %ext11, i32 *%ptr
  store volatile i32 %ext12, i32 *%ptr
  store volatile i32 %ext13, i32 *%ptr
  store volatile i32 %ext14, i32 *%ptr
  store volatile i32 %ext15, i32 *%ptr

  ret void
}